1. Field of the Invention
The present invention relates to photolithography and more particularly to optical proximity correction methods used during the development of photolithography masks used to manufacture semiconductor devices.
2. Background of the Invention
Lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs). In such a case, the mask will generally contain a circuit pattern corresponding to an individual layer of the IC, and a projection beam of radiation will be used to image this pattern onto various target portions (each comprising one or more dies) on a substrate (silicon wafer) that has been coated with a layer of radiation-sensitive material (resist). In general, a single wafer will contain a whole network of adjacent target portions that are successively irradiated, one at a time. In one type of lithographic apparatus, each target portion is irradiated by exposing the entire mask pattern onto the target portion in one go; such an apparatus is commonly referred to as a wafer stepper. In an alternative apparatus - commonly referred to as a step-and-scan apparatus - each target portion is irradiated by progressively scanning the mask pattern through the projection beam in a given reference direction (the xe2x80x9cscanningxe2x80x9d direction) while synchronously scanning the substrate parallel or anti-parallel to this direction; in the case of a projection system having a magnification factor M (generally  less than 1), the speed V at which the substrate is scanned will be a factor M times that at which the mask pattern is scanned. More information with regard to lithographic apparatus as here described can be gleaned, for example, from U.S. Pat No. 6,046,792, incorporated herein by reference.
Lithographic apparatus may employ various types of projection radiation, non-limiting examples of which include ultra-violet light (xe2x80x9cUVxe2x80x9d) radiation (e.g., with a wavelength of 365 nm, 248 nm, 193 nm, 157 nm or 126 nm), extreme UV (xe2x80x9cEUVxe2x80x9d), X-rays, ion beams or electron beams. Depending on the type of radiation used and the particular design requirements of the apparatus, it may comprise a projection system having refractive, reflective or catadioptric components, and comprise vitreous elements, grazing-incidence mirrors, selective multi-layer coatings, magnetic and/or electrostatic field lenses, etc; for simplicity, such components may be loosely referred to in this text, either singly or collectively, as a xe2x80x9clensxe2x80x9d.
In a manufacturing process using such a lithographic projection apparatus, a pattern in a mask is imaged onto a substrate which is at least partially covered by a layer of radiation-sensitive material (resist). Prior to this imaging step, the substrate may undergo various procedures, such as priming, resist coating and a soft bake. After exposure, the substrate may be subjected to other procedures, such as a post-exposure bake (PEB), development, a hard bake and measurement/inspection of the imaged features. This array of procedures is used as a basis to pattern an individual layer of a device, e.g., an integrated circuit (IC). Such a patterned layer may then undergo various processes such as etching, ion-implantation (doping), metallization, oxidation, chemo-mechanical polishing, etc., all intended to finish off an individual layer. If several layers are required, then the whole procedure, or a variant thereof, will have to be repeated for each new layer. Eventually, an array of devices will be present on the substrate (wafer). These devices are then separated from one another by a technique such as dicing or sawing, whence the individual devices can be mounted on a carrier, connected to pins, etc. Further information regarding such processes may be obtained, for example, from the book xe2x80x9cMicrochip Fabrication: A Practical Guide to Semiconductor Processingxe2x80x9d, Third Edition, by Peter van Zant, McGraw Hill Publishing Co., 1997 ISBN 0-07-067250-4.
As semiconductor manufacturing technology is quickly pushing towards the limits of optical lithography, the state-of-the-art processes to date have regularly produced ICs with features exhibiting critical dimensions (xe2x80x9cCDsxe2x80x9d) which are below the exposure wavelength (xe2x80x9cxcexxe2x80x9d). A xe2x80x9ccritical dimensionxe2x80x9d of a circuit is defined as the smallest width of a feature or the smallest space between two features. For feature patterns that are designed to be smaller than xcex, it has been recognized that the optical proximity effect (OPE) becomes much more severe, and in fact becomes intolerable for leading edge sub-xcex production processes.
Optical proximity effects are a well known characteristic of optical projection exposure tools. More specifically, proximity effects occur when very closely spaced circuit patterns are lithographically transferred to a resist layer on a wafer. The light waves of the closely spaced circuit features interact, thereby distorting the final transferred pattern features. In other words, diffraction causes adjacent features to interact with each other in such a way as to produce pattern dependent variations. The magnitude of the OPE on a given feature depends on the feature""s placement on the mask with respect to other features.
One of the primary problems caused by such proximity effects is an undesirable variation in feature CDs. For any leading edge semiconductor process, achieving tight control over the CDs of the features (i.e., circuit elements and interconnects) is typically the number one manufacturing goal, since this has a direct impact on wafer sort yield and speed-binning of the final product.
It has been known that the variations in the CDs of circuit features caused by OPE can be reduced by several methods. One such technique involves adjusting the illumination characteristics of the exposure tool. More specifically, by carefully selecting the ratio of the numerical aperture of the illumination condenser (xe2x80x9cNAcxe2x80x9d) to the numerical aperture of the imaging objective lens (xe2x80x9cNAoxe2x80x9d) (this ratio has been referred to as the partial coherence ratio-"sgr"), the degree of OPE can be manipulated to some extent.
In addition to using relatively incoherent illumination, such as described above, OPE can also be compensated for by xe2x80x9cpre-correctingxe2x80x9d the mask features. This family of techniques is generally known as optical proximity correction (OPC) techniques.
For example, in U.S. Pat. No. 5,242,770 (the ""770 patent), which is hereby incorporated by reference, the method of using scattering bars (SBs) for OPC is described. The ""770 patent demonstrates that the SB method is very effective for modifying isolated features so that the features behave as if the features are dense features. In so doing, the depth of focus (DOF) for the isolated features is also improved, thereby significantly increasing process latitude. Scattering bars (also known as intensity leveling bars or assist bars) are correction features (typically non-resolvable by the exposure tool) that are placed next to isolated feature edges on a mask in order to adjust the edge intensity gradients of the isolated edges. Preferably, the adjusted edge intensity gradients of the isolated edges match the edge intensity gradients of the dense feature edges, thereby causing the SB-assisted isolated features to have nearly the same width as densely nested features.
It is generally understood that the process latitude associated with dense structures is better than that associated with isolated structures under conventional illumination for large feature sizes. However, recently, more aggressive illumination schemes such as annular illumination and multipole illumination have been implemented as a means of improving resolution. When utilizing such illumination schemes, the inventors of the present invention have noted that some optical phenomenon have become more prominent. In particular, the inventors have noticed a forbidden pitch phenomena. More specifically, there are pitch ranges within which the process latitude of a xe2x80x9cdensely locatedxe2x80x9d main feature, especially the exposure latitude, is worse than that of an isolated feature of the same size. This important observation indicates that the existence of the neighboring feature is not always beneficial for main feature printing, which is in contradiction to what is commonly conceived, prior to the discovery by the present inventors. Indeed, the present inventors believe that the forbidden pitch phenomenon has become a limiting factor in advanced photolithography. As such, suppressing the forbidden pitch phenomenon will be necessary to further improve the CDs and process latitude obtainable utilizing currently known semiconductor device manufacturing tools and techniques.
Accordingly, the present invention relates to a method and technique for identifying and eliminating forbidden pitch regions, which degrade the overall printing performance, so as to allow for an improvement of the CDs and process latitude obtainable utilizing currently known photolithography tools and techniques.
The present invention relates to a method and procedure for both identifying xe2x80x9cforbidden pitchxe2x80x9d regions, in which both the critical dimension of the feature and the process latitude of the feature are negatively effected, and eliminating the use of xe2x80x9cforbidden pitchxe2x80x9d regions during the design/manufacturing process.
More specifically, the present invention relates to a method of identifying undesirable pitches between features when designing an integrated circuit (or other device) to be formed on a substrate by use of a lithographic exposure tool. In an exemplary embodiment, the method comprises the steps of (a) identifying extreme interaction pitch regions by determining illumination intensity levels for a given illumination angle over a range of pitches; and (b) identifying the undesirable pitches for each extreme interaction pitch region identified in step (a) by determining illumination intensities for a given extreme interaction pitch region over a range of illumination angles.
In accordance with the present invention, it is shown that the variation of the critical dimension as well as the process latitude of a main feature is a direct consequence of light field interference between the main feature and the neighboring features. Depending on the phase of the field produced by the neighboring features, the main feature critical dimension and process latitude can be improved by constructive light field interference, or degraded by destructive light field interference. The phase of the field produced by the neighboring features can be shown to be dependent on the pitch as well as the illumination angle. For a given illumination angle, the forbidden pitch lies in the location where the field produced by the neighboring features interferes with the field of the main feature destructively. The present invention provides a method for identifying the forbidden pitch regions (i.e., locations) for any feature size and any illumination condition. More importantly, the present invention provides a method for performing illumination design in order to suppress the forbidden pitch phenomena, thereby suppressing the negative effects associated therewith. In addition, the present invention provides for a method for utilizing scattering bar placement in conjunction with the suppression of the forbidden pitch phenomena to further minimize optical proximity effects and optimize overall printing performance.
As described in further detail below, the present invention provides significant advantages over the prior art. Most importantly, the present invention provides for identifying and eliminating forbidden pitch regions, which degrade the overall printing performance, thereby allowing for an improvement of the CDs and process latitude obtainable utilizing currently known photolithography tools and techniques.
Additional advantages of the present invention will become apparent to those skilled in the art from the following detailed description of exemplary embodiments of the present invention.
The invention itself, together with further objects and advantages, can be better understood by reference to the following detailed description and the accompanying drawings.